Merge branch 'master' of mus.cacr.caltech.edu:htsworkflow

[htsworkflow.git] / htsworkflow / pipelines / test / testdata / rta_intensities_config_1.12.4.2.xml

diff --git a/htsworkflow/pipelines/test/testdata/rta_intensities_config_1.12.4.2.xml b/htsworkflow/pipelines/test/testdata/rta_intensities_config_1.12.4.2.xml
new file mode 100755 (executable)
index 0000000..6d43157
--- /dev/null
+++ b/htsworkflow/pipelines/test/testdata/rta_intensities_config_1.12.4.2.xml
@@ -0,0 +1,472 @@
+<?xml version="1.0" encoding="utf-8"?>\r
+<ImageAnalysis xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xsd="http://www.w3.org/2001/XMLSchema">\r
+  <Run Name="Intensities">\r
+    <Cycles First="1" Last="57" Number="57" />\r
+    <ImageParameters>\r
+      <AutoOffsetFlag>0</AutoOffsetFlag>\r
+      <AutoSizeFlag>0</AutoSizeFlag>\r
+      <Fwhm>0</Fwhm>\r
+      <RemappingDistance>0</RemappingDistance>\r
+      <Threshold>0</Threshold>\r
+    </ImageParameters>\r
+    <RunParameters>\r
+      <AutoCycleFlag>0</AutoCycleFlag>\r
+      <BasecallFlag>0</BasecallFlag>\r
+      <Deblocked>0</Deblocked>\r
+      <DebugFlag>0</DebugFlag>\r
+      <FirstRunOnlyFlag>0</FirstRunOnlyFlag>\r
+      <ImagingReads Index="1">\r
+        <FirstCycle>1</FirstCycle>\r
+        <LastCycle>50</LastCycle>\r
+        <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>\r
+      </ImagingReads>\r
+      <ImagingReads Index="2">\r
+        <FirstCycle>51</FirstCycle>\r
+        <LastCycle>57</LastCycle>\r
+        <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>\r
+      </ImagingReads>\r
+      <Instrument>HWI-ST0787</Instrument>\r
+      <IterativeMatrixFlag>0</IterativeMatrixFlag>\r
+      <MakeFlag>0</MakeFlag>\r
+      <MaxCycle>0</MaxCycle>\r
+      <MinCycle>0</MinCycle>\r
+      <Reads Index="1">\r
+        <FirstCycle>1</FirstCycle>\r
+        <LastCycle>50</LastCycle>\r
+        <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>\r
+      </Reads>\r
+      <Reads Index="2">\r
+        <FirstCycle>51</FirstCycle>\r
+        <LastCycle>57</LastCycle>\r
+        <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>\r
+      </Reads>\r
+      <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>\r
+      <RunFolderDate>110815</RunFolderDate>\r
+      <RunFolderId>0101</RunFolderId>\r
+      <RunFlowcellId>D07K6ACXX</RunFlowcellId>\r
+      <Barcode>\r
+        <Cycle Use="true">51</Cycle>\r
+        <Cycle Use="true">52</Cycle>\r
+        <Cycle Use="true">53</Cycle>\r
+        <Cycle Use="true">54</Cycle>\r
+        <Cycle Use="true">55</Cycle>\r
+        <Cycle Use="true">56</Cycle>\r
+        <Cycle Use="true">57</Cycle>\r
+      </Barcode>\r
+      <QTableVersion>New6</QTableVersion>\r
+    </RunParameters>\r
+    <Software Name="RTA" Version="1.12.4.2" />\r
+    <TileSelection>\r
+      <Lane Index="1">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1102</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1108</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1204</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1205</Tile>\r
+        <Tile>1206</Tile>\r
+        <Tile>1208</Tile>\r
+        <Tile>1301</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>1304</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1305</Tile>\r
+        <Tile>1306</Tile>\r
+        <Tile>1308</Tile>\r
+        <Tile>2102</Tile>\r
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+        <Tile>1207</Tile>\r
+        <Tile>2105</Tile>\r
+        <Tile>2106</Tile>\r
+        <Tile>2104</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>2201</Tile>\r
+        <Tile>2202</Tile>\r
+        <Tile>1307</Tile>\r
+        <Tile>2206</Tile>\r
+        <Tile>2205</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2302</Tile>\r
+        <Tile>2103</Tile>\r
+        <Tile>2301</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2305</Tile>\r
+        <Tile>2107</Tile>\r
+        <Tile>2203</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2306</Tile>\r
+        <Tile>2207</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2303</Tile>\r
+        <Tile>2308</Tile>\r
+        <Tile>2307</Tile>\r
+      </Lane>\r
+      <Lane Index="2">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1102</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1205</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>1206</Tile>\r
+        <Tile>1108</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>1204</Tile>\r
+        <Tile>1301</Tile>\r
+        <Tile>1208</Tile>\r
+        <Tile>1207</Tile>\r
+        <Tile>1305</Tile>\r
+        <Tile>1306</Tile>\r
+        <Tile>1304</Tile>\r
+        <Tile>2101</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>2102</Tile>\r
+        <Tile>1308</Tile>\r
+        <Tile>2105</Tile>\r
+        <Tile>1307</Tile>\r
+        <Tile>2106</Tile>\r
+        <Tile>2201</Tile>\r
+        <Tile>2104</Tile>\r
+        <Tile>2103</Tile>\r
+        <Tile>2202</Tile>\r
+        <Tile>2205</Tile>\r
+        <Tile>2107</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2206</Tile>\r
+        <Tile>2301</Tile>\r
+        <Tile>2203</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2207</Tile>\r
+        <Tile>2302</Tile>\r
+        <Tile>2305</Tile>\r
+        <Tile>2303</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2306</Tile>\r
+        <Tile>2307</Tile>\r
+        <Tile>2308</Tile>\r
+      </Lane>\r
+      <Lane Index="3">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1102</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>1108</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1204</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1205</Tile>\r
+        <Tile>1206</Tile>\r
+        <Tile>1207</Tile>\r
+        <Tile>1208</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>1301</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>1304</Tile>\r
+        <Tile>1306</Tile>\r
+        <Tile>1305</Tile>\r
+        <Tile>1308</Tile>\r
+        <Tile>2101</Tile>\r
+        <Tile>2102</Tile>\r
+        <Tile>2105</Tile>\r
+        <Tile>1307</Tile>\r
+        <Tile>2104</Tile>\r
+        <Tile>2106</Tile>\r
+        <Tile>2201</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2103</Tile>\r
+        <Tile>2107</Tile>\r
+        <Tile>2202</Tile>\r
+        <Tile>2205</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2301</Tile>\r
+        <Tile>2206</Tile>\r
+        <Tile>2305</Tile>\r
+        <Tile>2203</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2302</Tile>\r
+        <Tile>2207</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2306</Tile>\r
+        <Tile>2303</Tile>\r
+        <Tile>2308</Tile>\r
+        <Tile>2307</Tile>\r
+      </Lane>\r
+      <Lane Index="4">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1102</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1205</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1301</Tile>\r
+        <Tile>1206</Tile>\r
+        <Tile>1108</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>1305</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>2101</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1306</Tile>\r
+        <Tile>1204</Tile>\r
+        <Tile>1207</Tile>\r
+        <Tile>2102</Tile>\r
+        <Tile>1208</Tile>\r
+        <Tile>2105</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>2106</Tile>\r
+        <Tile>1304</Tile>\r
+        <Tile>2201</Tile>\r
+        <Tile>1307</Tile>\r
+        <Tile>1308</Tile>\r
+        <Tile>2202</Tile>\r
+        <Tile>2103</Tile>\r
+        <Tile>2104</Tile>\r
+        <Tile>2205</Tile>\r
+        <Tile>2206</Tile>\r
+        <Tile>2302</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2301</Tile>\r
+        <Tile>2107</Tile>\r
+        <Tile>2305</Tile>\r
+        <Tile>2306</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2203</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2207</Tile>\r
+        <Tile>2303</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2308</Tile>\r
+        <Tile>2307</Tile>\r
+      </Lane>\r
+      <Lane Index="5">\r
+        <Sample>s</Sample>\r
+        <Tile>1102</Tile>\r
+        <Tile>1101</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1205</Tile>\r
+        <Tile>1206</Tile>\r
+        <Tile>1301</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1108</Tile>\r
+        <Tile>1305</Tile>\r
+        <Tile>1306</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>2102</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1204</Tile>\r
+        <Tile>2101</Tile>\r
+        <Tile>2106</Tile>\r
+        <Tile>1207</Tile>\r
+        <Tile>2202</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>1208</Tile>\r
+        <Tile>2105</Tile>\r
+        <Tile>2201</Tile>\r
+        <Tile>1304</Tile>\r
+        <Tile>1307</Tile>\r
+        <Tile>2206</Tile>\r
+        <Tile>2103</Tile>\r
+        <Tile>2205</Tile>\r
+        <Tile>2302</Tile>\r
+        <Tile>2107</Tile>\r
+        <Tile>1308</Tile>\r
+        <Tile>2301</Tile>\r
+        <Tile>2203</Tile>\r
+        <Tile>2104</Tile>\r
+        <Tile>2305</Tile>\r
+        <Tile>2207</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2306</Tile>\r
+        <Tile>2303</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2307</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2308</Tile>\r
+      </Lane>\r
+      <Lane Index="6">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1102</Tile>\r
+        <Tile>1103</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1105</Tile>\r
+        <Tile>1107</Tile>\r
+        <Tile>1202</Tile>\r
+        <Tile>1201</Tile>\r
+        <Tile>1203</Tile>\r
+        <Tile>1207</Tile>\r
+        <Tile>1205</Tile>\r
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+        <Tile>1301</Tile>\r
+        <Tile>1303</Tile>\r
+        <Tile>1302</Tile>\r
+        <Tile>1104</Tile>\r
+        <Tile>1305</Tile>\r
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+        <Tile>2305</Tile>\r
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+        <Tile>2104</Tile>\r
+        <Tile>2108</Tile>\r
+        <Tile>2204</Tile>\r
+        <Tile>2208</Tile>\r
+        <Tile>2304</Tile>\r
+        <Tile>2308</Tile>\r
+      </Lane>\r
+      <Lane Index="7">\r
+        <Sample>s</Sample>\r
+        <Tile>1102</Tile>\r
+        <Tile>1106</Tile>\r
+        <Tile>1101</Tile>\r
+        <Tile>1105</Tile>\r
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+        <Tile>2304</Tile>\r
+        <Tile>2308</Tile>\r
+      </Lane>\r
+      <Lane Index="8">\r
+        <Sample>s</Sample>\r
+        <Tile>1101</Tile>\r
+        <Tile>1102</Tile>\r
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+        <Tile>1106</Tile>\r
+        <Tile>1201</Tile>\r
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+        <Tile>2203</Tile>\r
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+        <Tile>2304</Tile>\r
+        <Tile>2308</Tile>\r
+      </Lane>\r
+    </TileSelection>\r
+    <Time />\r
+    <User />\r
+  </Run>\r
+</ImageAnalysis>
\ No newline at end of file