1 /* ieee-utils/fp-gnux86.c
3 * Copyright (C) 1996, 1997, 1998, 1999, 2000, 2007 Brian Gough
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 3 of the License, or (at
8 * your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 #include <fpu_control.h>
22 #include <gsl/gsl_errno.h>
23 #include <gsl/gsl_ieee_utils.h>
25 /* Handle libc5, where _FPU_SETCW is not available, suggested by
26 OKUJI Yoshinori <okuji@gnu.org> and Evgeny Stambulchik
27 <fnevgeny@plasma-gate.weizmann.ac.il> */
30 #include <i386/fpu_control.h>
31 #define _FPU_SETCW(cw) __setfpucw(cw)
35 gsl_ieee_set_mode (int precision, int rounding, int exception_mask)
37 unsigned short mode = 0 ;
41 case GSL_IEEE_SINGLE_PRECISION:
44 case GSL_IEEE_DOUBLE_PRECISION:
47 case GSL_IEEE_EXTENDED_PRECISION:
48 mode |= _FPU_EXTENDED ;
51 mode |= _FPU_EXTENDED ;
56 case GSL_IEEE_ROUND_TO_NEAREST:
57 mode |= _FPU_RC_NEAREST ;
59 case GSL_IEEE_ROUND_DOWN:
60 mode |= _FPU_RC_DOWN ;
62 case GSL_IEEE_ROUND_UP:
65 case GSL_IEEE_ROUND_TO_ZERO:
66 mode |= _FPU_RC_ZERO ;
69 mode |= _FPU_RC_NEAREST ;
72 if (exception_mask & GSL_IEEE_MASK_INVALID)
73 mode |= _FPU_MASK_IM ;
75 if (exception_mask & GSL_IEEE_MASK_DENORMALIZED)
76 mode |= _FPU_MASK_DM ;
78 if (exception_mask & GSL_IEEE_MASK_DIVISION_BY_ZERO)
79 mode |= _FPU_MASK_ZM ;
81 if (exception_mask & GSL_IEEE_MASK_OVERFLOW)
82 mode |= _FPU_MASK_OM ;
84 if (exception_mask & GSL_IEEE_MASK_UNDERFLOW)
85 mode |= _FPU_MASK_UM ;
87 if (exception_mask & GSL_IEEE_TRAP_INEXACT)
89 mode &= ~ _FPU_MASK_PM ;
93 mode |= _FPU_MASK_PM ;
99 #define _FPU_SETMXCSR(cw_sse) asm volatile ("ldmxcsr %0" : : "m" (*&cw_sse))
101 unsigned int mode_sse = 0;
103 mode_sse |= (mode & 0x3f)<<7; /* exception masks */
104 mode_sse |= (mode & 0xc00)<<3; /* rounding control */
106 _FPU_SETMXCSR(mode_sse);