Simulate a HiSeq runfolder.
[htsworkflow.git] / htsworkflow / pipelines / test / testdata / demultiplexed_bustard_1.12.4.2.xml
1 <?xml version="1.0"?>
2 <BaseCallAnalysis xmlns:xsd="http://www.w3.org/2001/XMLSchema" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
3   <Run Name="BaseCalls">
4     <BaseCallParameters>
5       <ChastityThreshold>0.6</ChastityThreshold>
6       <Matrix Path="">
7         <AutoFlag>2</AutoFlag>
8         <AutoLane>0</AutoLane>
9         <Cycle>1</Cycle>
10         <CycleOffset>0</CycleOffset>
11         <FirstCycle>1</FirstCycle>
12         <LastCycle>50</LastCycle>
13         <Read>1</Read>
14       </Matrix>
15       <Matrix Path="">
16         <AutoFlag>2</AutoFlag>
17         <AutoLane>0</AutoLane>
18         <Cycle>51</Cycle>
19         <CycleOffset>0</CycleOffset>
20         <FirstCycle>51</FirstCycle>
21         <LastCycle>57</LastCycle>
22         <Read>2</Read>
23       </Matrix>
24       <Phasing Path="">
25         <AutoFlag>2</AutoFlag>
26         <AutoLane>0</AutoLane>
27         <Cycle>2</Cycle>
28         <CycleOffset>1</CycleOffset>
29         <FirstCycle>1</FirstCycle>
30         <LastCycle>50</LastCycle>
31         <PhasingRate>0</PhasingRate>
32         <PrephasingRate>0</PrephasingRate>
33         <Read>1</Read>
34       </Phasing>
35       <Phasing Path="">
36         <AutoFlag>2</AutoFlag>
37         <AutoLane>0</AutoLane>
38         <Cycle>52</Cycle>
39         <CycleOffset>1</CycleOffset>
40         <FirstCycle>51</FirstCycle>
41         <LastCycle>57</LastCycle>
42         <PhasingRate>0</PhasingRate>
43         <PrephasingRate>0</PrephasingRate>
44         <Read>2</Read>
45       </Phasing>
46       <PureBases>0</PureBases>
47       <SmtFilter>failed-chastity</SmtFilter>
48       <SmtRelation>le</SmtRelation>
49       <SmtThreshold>1.0</SmtThreshold>
50     </BaseCallParameters>
51     <Cycles First="1" Last="57" Number="57"/>
52     <RunParameters>
53       <AutoCycleFlag>0</AutoCycleFlag>
54       <Barcode>
55         <Cycle Use="true">51</Cycle>
56         <Cycle Use="true">52</Cycle>
57         <Cycle Use="true">53</Cycle>
58         <Cycle Use="true">54</Cycle>
59         <Cycle Use="true">55</Cycle>
60         <Cycle Use="true">56</Cycle>
61         <Cycle Use="true">57</Cycle>
62       </Barcode>
63       <BasecallFlag>0</BasecallFlag>
64       <Deblocked>0</Deblocked>
65       <DebugFlag>0</DebugFlag>
66       <FirstRunOnlyFlag>0</FirstRunOnlyFlag>
67       <ImagingReads Index="1">
68         <FirstCycle>1</FirstCycle>
69         <LastCycle>50</LastCycle>
70       </ImagingReads>
71       <ImagingReads Index="2">
72         <FirstCycle>51</FirstCycle>
73         <LastCycle>57</LastCycle>
74         <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>
75       </ImagingReads>
76       <Instrument>HWI-ST0787</Instrument>
77       <IterativeMatrixFlag>0</IterativeMatrixFlag>
78       <MakeFlag>0</MakeFlag>
79       <MaxCycle>0</MaxCycle>
80       <MinCycle>0</MinCycle>
81       <QTableVersion>New6</QTableVersion>
82       <RunFlowcellId>D07K6ACXX</RunFlowcellId>
83       <RunFolder>110815_SN787_0101_AD07K6ACXX</RunFolder>
84       <RunFolderDate>110815</RunFolderDate>
85       <RunFolderId>0101</RunFolderId>
86       <Reads Index="1">
87         <FirstCycle>1</FirstCycle>
88         <LastCycle>50</LastCycle>
89       </Reads>
90     </RunParameters>
91     <Software Name="RTA" Version="1.12.4.2"/>
92     <TileSelection>
93       <Lane Index="1">
94         <Sample>s</Sample>
95         <Tile>1102</Tile>
96         <Tile>1101</Tile>
97         <Tile>1103</Tile>
98         <Tile>1106</Tile>
99         <Tile>1104</Tile>
100         <Tile>1105</Tile>
101         <Tile>1108</Tile>
102         <Tile>1107</Tile>
103         <Tile>1202</Tile>
104         <Tile>1201</Tile>
105         <Tile>1206</Tile>
106         <Tile>1204</Tile>
107         <Tile>1203</Tile>
108         <Tile>1205</Tile>
109         <Tile>1302</Tile>
110         <Tile>1208</Tile>
111         <Tile>1207</Tile>
112         <Tile>1301</Tile>
113         <Tile>1306</Tile>
114         <Tile>1304</Tile>
115         <Tile>1305</Tile>
116         <Tile>2102</Tile>
117         <Tile>1303</Tile>
118         <Tile>1308</Tile>
119         <Tile>2101</Tile>
120         <Tile>1307</Tile>
121         <Tile>2106</Tile>
122         <Tile>2104</Tile>
123         <Tile>2105</Tile>
124         <Tile>2103</Tile>
125         <Tile>2202</Tile>
126         <Tile>2108</Tile>
127         <Tile>2201</Tile>
128         <Tile>2206</Tile>
129         <Tile>2107</Tile>
130         <Tile>2205</Tile>
131         <Tile>2204</Tile>
132         <Tile>2203</Tile>
133         <Tile>2302</Tile>
134         <Tile>2301</Tile>
135         <Tile>2208</Tile>
136         <Tile>2306</Tile>
137         <Tile>2207</Tile>
138         <Tile>2305</Tile>
139         <Tile>2303</Tile>
140         <Tile>2304</Tile>
141         <Tile>2308</Tile>
142         <Tile>2307</Tile>
143       </Lane>
144       <Lane Index="2">
145         <Sample>s</Sample>
146         <Tile>1101</Tile>
147         <Tile>1102</Tile>
148         <Tile>1105</Tile>
149         <Tile>1106</Tile>
150         <Tile>1104</Tile>
151         <Tile>1103</Tile>
152         <Tile>1201</Tile>
153         <Tile>1202</Tile>
154         <Tile>1108</Tile>
155         <Tile>1206</Tile>
156         <Tile>1107</Tile>
157         <Tile>1205</Tile>
158         <Tile>1302</Tile>
159         <Tile>1204</Tile>
160         <Tile>1301</Tile>
161         <Tile>1203</Tile>
162         <Tile>1208</Tile>
163         <Tile>1306</Tile>
164         <Tile>1305</Tile>
165         <Tile>1207</Tile>
166         <Tile>1304</Tile>
167         <Tile>2101</Tile>
168         <Tile>2102</Tile>
169         <Tile>1308</Tile>
170         <Tile>2105</Tile>
171         <Tile>1303</Tile>
172         <Tile>2201</Tile>
173         <Tile>2106</Tile>
174         <Tile>2104</Tile>
175         <Tile>1307</Tile>
176         <Tile>2205</Tile>
177         <Tile>2202</Tile>
178         <Tile>2108</Tile>
179         <Tile>2206</Tile>
180         <Tile>2103</Tile>
181         <Tile>2301</Tile>
182         <Tile>2204</Tile>
183         <Tile>2208</Tile>
184         <Tile>2107</Tile>
185         <Tile>2302</Tile>
186         <Tile>2305</Tile>
187         <Tile>2304</Tile>
188         <Tile>2203</Tile>
189         <Tile>2306</Tile>
190         <Tile>2308</Tile>
191         <Tile>2207</Tile>
192         <Tile>2303</Tile>
193         <Tile>2307</Tile>
194       </Lane>
195       <Lane Index="3">
196         <Sample>s</Sample>
197         <Tile>1101</Tile>
198         <Tile>1102</Tile>
199         <Tile>1105</Tile>
200         <Tile>1104</Tile>
201         <Tile>1108</Tile>
202         <Tile>1106</Tile>
203         <Tile>1201</Tile>
204         <Tile>1103</Tile>
205         <Tile>1204</Tile>
206         <Tile>1202</Tile>
207         <Tile>1205</Tile>
208         <Tile>1107</Tile>
209         <Tile>1208</Tile>
210         <Tile>1206</Tile>
211         <Tile>1301</Tile>
212         <Tile>1304</Tile>
213         <Tile>1203</Tile>
214         <Tile>1302</Tile>
215         <Tile>1308</Tile>
216         <Tile>1305</Tile>
217         <Tile>1207</Tile>
218         <Tile>2101</Tile>
219         <Tile>2104</Tile>
220         <Tile>1306</Tile>
221         <Tile>1303</Tile>
222         <Tile>2102</Tile>
223         <Tile>2105</Tile>
224         <Tile>2108</Tile>
225         <Tile>1307</Tile>
226         <Tile>2106</Tile>
227         <Tile>2204</Tile>
228         <Tile>2201</Tile>
229         <Tile>2103</Tile>
230         <Tile>2208</Tile>
231         <Tile>2202</Tile>
232         <Tile>2107</Tile>
233         <Tile>2205</Tile>
234         <Tile>2301</Tile>
235         <Tile>2304</Tile>
236         <Tile>2203</Tile>
237         <Tile>2206</Tile>
238         <Tile>2207</Tile>
239         <Tile>2305</Tile>
240         <Tile>2308</Tile>
241         <Tile>2302</Tile>
242         <Tile>2303</Tile>
243         <Tile>2307</Tile>
244         <Tile>2306</Tile>
245       </Lane>
246       <Lane Index="4">
247         <Sample>s</Sample>
248         <Tile>1101</Tile>
249         <Tile>1104</Tile>
250         <Tile>1103</Tile>
251         <Tile>1102</Tile>
252         <Tile>1108</Tile>
253         <Tile>1105</Tile>
254         <Tile>1107</Tile>
255         <Tile>1106</Tile>
256         <Tile>1204</Tile>
257         <Tile>1201</Tile>
258         <Tile>1203</Tile>
259         <Tile>1202</Tile>
260         <Tile>1208</Tile>
261         <Tile>1205</Tile>
262         <Tile>1207</Tile>
263         <Tile>1206</Tile>
264         <Tile>1304</Tile>
265         <Tile>1301</Tile>
266         <Tile>1302</Tile>
267         <Tile>1308</Tile>
268         <Tile>1303</Tile>
269         <Tile>1305</Tile>
270         <Tile>1306</Tile>
271         <Tile>1307</Tile>
272         <Tile>2104</Tile>
273         <Tile>2101</Tile>
274         <Tile>2108</Tile>
275         <Tile>2102</Tile>
276         <Tile>2103</Tile>
277         <Tile>2105</Tile>
278         <Tile>2204</Tile>
279         <Tile>2106</Tile>
280         <Tile>2107</Tile>
281         <Tile>2201</Tile>
282         <Tile>2208</Tile>
283         <Tile>2202</Tile>
284         <Tile>2203</Tile>
285         <Tile>2304</Tile>
286         <Tile>2205</Tile>
287         <Tile>2206</Tile>
288         <Tile>2207</Tile>
289         <Tile>2308</Tile>
290         <Tile>2301</Tile>
291         <Tile>2302</Tile>
292         <Tile>2303</Tile>
293         <Tile>2305</Tile>
294         <Tile>2307</Tile>
295         <Tile>2306</Tile>
296       </Lane>
297       <Lane Index="5">
298         <Sample>s</Sample>
299         <Tile>1104</Tile>
300         <Tile>1108</Tile>
301         <Tile>1101</Tile>
302         <Tile>1204</Tile>
303         <Tile>1102</Tile>
304         <Tile>1103</Tile>
305         <Tile>1106</Tile>
306         <Tile>1105</Tile>
307         <Tile>1107</Tile>
308         <Tile>1208</Tile>
309         <Tile>1201</Tile>
310         <Tile>1202</Tile>
311         <Tile>1203</Tile>
312         <Tile>1304</Tile>
313         <Tile>1205</Tile>
314         <Tile>1206</Tile>
315         <Tile>1301</Tile>
316         <Tile>1308</Tile>
317         <Tile>1207</Tile>
318         <Tile>1302</Tile>
319         <Tile>2104</Tile>
320         <Tile>1303</Tile>
321         <Tile>1305</Tile>
322         <Tile>1306</Tile>
323         <Tile>2101</Tile>
324         <Tile>2102</Tile>
325         <Tile>1307</Tile>
326         <Tile>2108</Tile>
327         <Tile>2204</Tile>
328         <Tile>2103</Tile>
329         <Tile>2105</Tile>
330         <Tile>2107</Tile>
331         <Tile>2106</Tile>
332         <Tile>2201</Tile>
333         <Tile>2208</Tile>
334         <Tile>2203</Tile>
335         <Tile>2202</Tile>
336         <Tile>2304</Tile>
337         <Tile>2206</Tile>
338         <Tile>2205</Tile>
339         <Tile>2207</Tile>
340         <Tile>2302</Tile>
341         <Tile>2301</Tile>
342         <Tile>2303</Tile>
343         <Tile>2308</Tile>
344         <Tile>2305</Tile>
345         <Tile>2307</Tile>
346         <Tile>2306</Tile>
347       </Lane>
348       <Lane Index="6">
349         <Sample>s</Sample>
350         <Tile>1104</Tile>
351         <Tile>1101</Tile>
352         <Tile>1103</Tile>
353         <Tile>1102</Tile>
354         <Tile>1108</Tile>
355         <Tile>1107</Tile>
356         <Tile>1105</Tile>
357         <Tile>1106</Tile>
358         <Tile>1204</Tile>
359         <Tile>1203</Tile>
360         <Tile>1201</Tile>
361         <Tile>1202</Tile>
362         <Tile>1208</Tile>
363         <Tile>1207</Tile>
364         <Tile>1205</Tile>
365         <Tile>1206</Tile>
366         <Tile>1304</Tile>
367         <Tile>1303</Tile>
368         <Tile>1301</Tile>
369         <Tile>1302</Tile>
370         <Tile>1308</Tile>
371         <Tile>1307</Tile>
372         <Tile>1305</Tile>
373         <Tile>2104</Tile>
374         <Tile>1306</Tile>
375         <Tile>2103</Tile>
376         <Tile>2101</Tile>
377         <Tile>2102</Tile>
378         <Tile>2108</Tile>
379         <Tile>2107</Tile>
380         <Tile>2105</Tile>
381         <Tile>2106</Tile>
382         <Tile>2204</Tile>
383         <Tile>2203</Tile>
384         <Tile>2202</Tile>
385         <Tile>2201</Tile>
386         <Tile>2208</Tile>
387         <Tile>2207</Tile>
388         <Tile>2206</Tile>
389         <Tile>2205</Tile>
390         <Tile>2304</Tile>
391         <Tile>2303</Tile>
392         <Tile>2302</Tile>
393         <Tile>2301</Tile>
394         <Tile>2307</Tile>
395         <Tile>2308</Tile>
396         <Tile>2306</Tile>
397         <Tile>2305</Tile>
398       </Lane>
399       <Lane Index="7">
400         <Sample>s</Sample>
401         <Tile>1103</Tile>
402         <Tile>1107</Tile>
403         <Tile>1104</Tile>
404         <Tile>1108</Tile>
405         <Tile>1203</Tile>
406         <Tile>1101</Tile>
407         <Tile>1102</Tile>
408         <Tile>1204</Tile>
409         <Tile>1105</Tile>
410         <Tile>1207</Tile>
411         <Tile>1106</Tile>
412         <Tile>1208</Tile>
413         <Tile>1201</Tile>
414         <Tile>1202</Tile>
415         <Tile>1303</Tile>
416         <Tile>1205</Tile>
417         <Tile>1206</Tile>
418         <Tile>1307</Tile>
419         <Tile>1304</Tile>
420         <Tile>1301</Tile>
421         <Tile>1302</Tile>
422         <Tile>1305</Tile>
423         <Tile>1308</Tile>
424         <Tile>2103</Tile>
425         <Tile>1306</Tile>
426         <Tile>2101</Tile>
427         <Tile>2107</Tile>
428         <Tile>2104</Tile>
429         <Tile>2105</Tile>
430         <Tile>2102</Tile>
431         <Tile>2108</Tile>
432         <Tile>2203</Tile>
433         <Tile>2201</Tile>
434         <Tile>2106</Tile>
435         <Tile>2205</Tile>
436         <Tile>2207</Tile>
437         <Tile>2202</Tile>
438         <Tile>2204</Tile>
439         <Tile>2301</Tile>
440         <Tile>2303</Tile>
441         <Tile>2206</Tile>
442         <Tile>2208</Tile>
443         <Tile>2305</Tile>
444         <Tile>2307</Tile>
445         <Tile>2302</Tile>
446         <Tile>2304</Tile>
447         <Tile>2306</Tile>
448         <Tile>2308</Tile>
449       </Lane>
450       <Lane Index="8">
451         <Sample>s</Sample>
452         <Tile>1101</Tile>
453         <Tile>1103</Tile>
454         <Tile>1102</Tile>
455         <Tile>1105</Tile>
456         <Tile>1107</Tile>
457         <Tile>1104</Tile>
458         <Tile>1106</Tile>
459         <Tile>1201</Tile>
460         <Tile>1108</Tile>
461         <Tile>1203</Tile>
462         <Tile>1202</Tile>
463         <Tile>1205</Tile>
464         <Tile>1207</Tile>
465         <Tile>1204</Tile>
466         <Tile>1206</Tile>
467         <Tile>1301</Tile>
468         <Tile>1208</Tile>
469         <Tile>1303</Tile>
470         <Tile>1302</Tile>
471         <Tile>1305</Tile>
472         <Tile>1307</Tile>
473         <Tile>1304</Tile>
474         <Tile>1306</Tile>
475         <Tile>2101</Tile>
476         <Tile>1308</Tile>
477         <Tile>2103</Tile>
478         <Tile>2105</Tile>
479         <Tile>2102</Tile>
480         <Tile>2107</Tile>
481         <Tile>2106</Tile>
482         <Tile>2104</Tile>
483         <Tile>2201</Tile>
484         <Tile>2205</Tile>
485         <Tile>2202</Tile>
486         <Tile>2203</Tile>
487         <Tile>2108</Tile>
488         <Tile>2206</Tile>
489         <Tile>2301</Tile>
490         <Tile>2207</Tile>
491         <Tile>2204</Tile>
492         <Tile>2305</Tile>
493         <Tile>2302</Tile>
494         <Tile>2303</Tile>
495         <Tile>2208</Tile>
496         <Tile>2306</Tile>
497         <Tile>2307</Tile>
498         <Tile>2304</Tile>
499         <Tile>2308</Tile>
500       </Lane>
501     </TileSelection>
502   </Run>
503 </BaseCallAnalysis>